Integrated circuit (IC) packaging plays a vital role in the continued development of integrated circuits. The IC device can include a semiconductor die (chip, wafer section), and some form of packaging which protects the chip. Packaging can be a significant factor in the overall performance and desirability of the IC for a specific use. The size of the IC package which contains the chip, in part, dictates the final size of the electronic device containing the IC. Further miniaturizing semiconductor packages is a continuing goal of design engineers.
Various package designs have been developed in an attempt to minimize the size of the completed device. A wafer chip scale package (WCSP) device provides a small device footprint and offers a compact package for integrated circuits, as a resin encapsulation is not required. With a WCSP device, solder balls, solder bumps, posts such as copper posts, etc., can be directly attached to interconnect terminals of the semiconductor chip. The active surface of the semiconductor chip can be protected by a patterned passivation layer which can include, for example, various polymers, organic materials, etc., which protects the active surface of the semiconductor chip. The chip and solder balls are placed active-side down on a PCB or other substrate in a flip chip style attachment, and the solder balls are reflowed to electrically couple the bond pads on the chip with conductive lands on the PCB.